TAREAS/TASKS:

• Design of open, modular, and extensible processors with RISC-V architecture

• Research in fault tolerance and safety mechanisms for RISC-V

• Physical design for RISC-V cores with safety-critical requirements.

HABILIDADES-CUALIFICACIONES/SKILLS-QUALIFICATIONS: 

Master's degree in Electrical and Electronics Engineering, Telecommunication, Computer Engineering, Computer Science, or similar. Exceptional candidates who have completed a bachelor's degree and passed all master's subjects, being only pending the defense of their master's thesis, will also be considered.

REQUERIMIENTOS ESPECIFICOS/SPECIFIC REQUIREMENTS:

• Competence on computer architectures and digital system design with HDLs (Verilog or VHDL).

• Notion on RISC-V ISA and the integration of custom accelerators. Embedded systems programming with C/C++

• Desirable knowledge on fault-tolerance in electronic systems.

• Valuable Knowledge of physical design with Cadence / Synopsys tools.

BENEFICIOS/BENEFITS:

The contract includes a gross salary of 25350 €, and full social benefits in Spain. The salary level is competitive for the current situation in Madrid. Conference, summer school and workshop registration fees will be also covered.
The contracted researcher will pursue an industrial PhD in Electrical and Electronic engineering in a joint program with INDRA, an international Spanish-based company, within the project “Chair UPM-INDRA in microelectronics”. 

CRITERIOS Y PROCESO DE SELECCION/ELIGIBILITY CRITERIA AND SELECTION PROCESS:

- Academic records at bachelor's and master's levels.- Previous experience in the design of digital systems, embedded software, RISC-V and DSP

- Motivation for doing a PhD, and abilities for dissemination, writing scientific papers, and presenting to public audiences, among others.

- Previous research experience

COMENTARIOS ADICIONALES/ADDITIONAL COMMENTS: