TAREAS/TASKS:
- Design space exploration for architectures beyond a single chip.
- Design tradeoffs: thermal, performance, power, etc.
- Validation, verification, and testing of heterogeneous systems.
HABILIDADES-CUALIFICACIONES/SKILLS-QUALIFICATIONS:
PhD degree in Electrical and Electronics Engineering or Telecommunication.
REQUERIMIENTOS ESPECIFICOS/SPECIFIC REQUIREMENTS:
- Background on design of mixed-signal circuits.
- Valuable Knowledge of comercial design tools like Cadence / Synopsys.
- Competence in digital architectures and digital system design with HDLs (Verilog or VHDL).
- Knowledge heterogeneous integration or chiplet design.
BENEFICIOS/BENEFITS:
The contract includes a gross salary of 36000 € and full social benefits in Spain. Conference,summer school and workshop registration fees will be also covered.
The contracted researcher will pursue an industrial PhD in Electrical and Electronic engineering in ajoint program with INDRA, an international Spanish-based company, within the project “ChairUPM-INDRA in microelectronics”.
CRITERIOS Y PROCESO DE SELECCION/ELIGIBILITY CRITERIA AND SELECTION PROCESS:
Se aplican las pautas establecidas en el proceso de selección del nuevo Reglamento para el proceso de selección ycontratación del personal investigador, personal técnico y personal gestor relacionado con la investigación de laUniversidad Politécnica de Madrid, aprobado en la UPM.The contract includes a gross salary of 25350 € and full social benefits in Spain. Conference,summer school and workshop registration fees will be also covered.The contracted researcher will pursue an industrial PhD in Electrical and Electronic engineering in ajoint program with INDRA, an international Spanish-based company, within the project “ChairUPM-INDRA in microelectronics”.
- Academic records at master's and PhD's levels.
- Previous experience in the design of electronic circuits.
-Motivation for doing a PhD and abilities for dissemination, writing scientific papers, andpresenting to public audiences, among others.
COMENTARIOS ADICIONALES/ADDITIONAL COMMENTS:
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