TAREAS/TASKS:

• Design of open hardware processors and open interfaces for SiP integration.

• Validation, verification, and testing of processors and accelerators based on RISC-V

• Physical design for operation under critical conditions.

HABILIDADES-CUALIFICACIONES/SKILLS-QUALIFICATIONS: 

Master degree on Electrical and Electronics Engineering, Telecommunication, Computer Engineering, Computer Science, or similar. Exceptional candidates who have completed a bachelor passed all master's subjects, and are only pending the defense of their master's thesis will also be considered

REQUERIMIENTOS ESPECIFICOS/SPECIFIC REQUIREMENTS:

• Competence in computer architectures and digital system design with HDLs (Verilog or VHDL).

• Embedded systems programming with C/C++

• Notion on RISC-V ISA and the integration of custom accelerators.

• Valuable Knowledge of physical design with Cadence / Synopsys tools.

BENEFICIOS/BENEFITS:

The contract includes a gross salary of 25350 €, and full social benefits in Spain. The salary level is competitive for the current situation in Madrid. Conference, summer school and workshop registration fees will be also covered. The contracted researcher will pursue an industrial PhD in Electrical and Electronic engineering in a joint program with INDRA, an international Spanish-based company, within the project “Chair UPM-INDRA in microelectronics”

CRITERIOS Y PROCESO DE SELECCION/ELIGIBILITY CRITERIA AND SELECTION PROCESS:

- Academic records at bachelor's and master's levels. - Previous experience in the design of digital systems, embedded software, and RISC-V - Motivation for doing a PhD, and abilities for dissemination, writing scientific papers, and presenting to public audiences, among others. - Previous research experience

COMENTARIOS ADICIONALES/ADDITIONAL COMMENTS: